TIA 1A - TELEVISION INTERFACE ADAPTOR (MODEL 1A)
3. Playfield graphics Register
A. Description
Objects such as walls, clouds, and score) which are not
required to move, are written into a 20 bit register called
the playfield register. This register (Figure 5) is loaded
from the data bus by three separate write addresses (PF0,
PFl, PF2). Playfield may be loaded at any time. To clear
the playfield, zeros must be written into all three
addresses.
B. Normal Serial Output
The playfield register is automatically scanned (and
converted to serial output) by a bi-directional shift
register clocked at a rate which spreads the twenty (20)
bits out over the left half of a horizontal line. This
scanning is initiated by the end of horizontal blank (left
edge of television screen). Normally the same scan is then
repeated, duplicating the same twenty (20) bit sequence
over the right half of the horizontal line.
C. Reflected Serial Output
A reflected playfield may be requested by writing a one
into bit zero of the playfield control register (CTRLPF).
When this bit is true the scanning shift register will scan
the opposite direction during the right half of the
horizontal line, reversing the twenty (20) bit sequence.
D. Timing Constraints
Even though the playfield bytes (PF0, PFl, PF2) may be
written to any time, if one of them is changed while being
serially scanned, part of the new value may both show up on
the television horizontal line.